Power trench MOSFETs are widely used as switching devices in many electronic applications. A parameter in trench power MOSFETs is the total gate charge. In some applications of conventional trench power MOSFETs, such as DC-DC converters, the lower the gate charge the better the efficiency of the overall design. In switching applications a relatively high proportion of power loss is due to gate to drain capacitance (Miller capacitance). Thus an effective way to lower the Miller capacitance is to increase the thickness of the gate to drain dielectric.
FIG. 1A-1B and FIG. 2 are cross-sectional views illustrating prior art trench MOSFETs. As is known in the prior art, a trench 112 is provided and dielectric ions are then formed and directed downward into the trench 112 by means of an electric field. The result of this process is shown in FIG. 1A, where a dielectric layer 101 has been formed (as a result of the ions) inside and outside the trench. The dielectric layer 101 is thicker at the bottom of the trench than on the sidewalls of trench. As shown in FIG. 1B, the dielectric layer 101 is then etched back or clipped back to remove the portions on the sidewalls of the trench. The result is shown in FIG. 1B, where a gate insulator 102 remains on the bottom surface and a portion of the sidewall of the trench—also called the trench bottom oxide.
The inventors have appreciated a need to provide a (vertical) trench gate MOSFET employing a gate having an improved configuration to reduce gate-drain capacitance Cgd, and a method of manufacturing the same. The inventors have further appreciated a need to provide a trench MOSFET whose remaining bottom oxide can be made with good uniformity and reproducibility in terms of its thickness. The inventors have further appreciated a need to provide a high cell density, for example with a trench width of 0.2 μm or less.